chipvault - Project organizer for VHDL and Verilog RTL hardware designs

Property Value
Distribution FreeBSD 10
Repository FreeBSD Ports Latest amd64
Package name chipvault
Package version 200607
Package architecture amd64
Package type txz
Installed size 399.03 KB
Download size 83.79 KB
Official Mirror
ChipVault is a VHDL and Verilog Chip Design Organization tool which improves
design efficiency by:
- Providing the ability to Navigate and Edit files Hierarchically.
- Automatically generating Schematic Component Port views of VHDL and
Verilog RTL files.
- Automating RTL instantiation and template generation.
- Providing Revision Control (designed for HW, not SW development).
- Supporting External Tool Hooks (bottom-up vcoms,etc).
- Providing an Issue Tracking Log with sorting.
- Providing Netlist sorting and hierarchy viewing.
- Supporting web-sharing of RTL files (both encrypted and clear).
- Fast and Nimble.
Categories: cad
===>   NOTICE:
The chipvault port currently does not have a maintainer. As a result, it is
more likely to have unresolved issues, not be up-to-date, or even be removed in
the future. To volunteer to maintain this port, please create an issue at:
More information about port maintainership is available at:


Package Version Architecture Repository
chipvault-200607.txz 200607 i386 FreeBSD Ports Quarterly
chipvault-200607.txz 200607 amd64 FreeBSD Ports Quarterly
chipvault-200607.txz 200607 i386 FreeBSD Ports Latest
chipvault - - -


Name Value
perl5 = 5.26.2


Type URL
Binary Package chipvault-200607.txz
Source Package cad/chipvault

Install Howto

Install chipvault txz package:

# pkg install chipvault

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